Devices in the home, such as typical home entertainment equipment for example, particular mention also being made of a personal computer which nowadays can also be considered home entertainment equipment, or also other household devices, for example “white goods” appliances, are increasingly being networked. This networking encompasses not only systems in which the devices are networked by means of wires, that is to say with appropriate cable connections between the devices, such as with the aid of the IEEE 1394 bus system for example, but also systems in which the devices are wirelessly networked. Particular mention is made at this point of the so-called HIPERLAN/2 system which has become established alongside the IEEE 802.11x system. The HIPERLAN/2 system enables the networking of devices in the home. It provides a number of approximately 20 MHz wide channels in the 5 GHz range, which in turn are subdivided according to a TDMA method (Time Division Multiplex Access).
The modulation method corresponds to an OFDM method (Orthogonal Frequency Division Multiplex), so that the least possible interference occurs during multipath receiving. The maximum data rate is in the range of 54 Mbit/s. Video data streams and audio data streams can consequently be transmitted in the HIPERLAN channels.
The HIPERLAN system has already been specified in an ETSI/BRAN standard. An overview of the system may be found in the document ETSI TR 101 683 V1.1.1 (2000/02) Broadband Radio Access Network (BRAN); HIPERLAN Type 2; System Overview. The key component for the invention is described in the document ETSI TS 101 493-1 V1.1.1 (2000/04); Broadband Radio Access Networks (BRAN); HIPERLAN Type 2; Packet Based Convergence Layer; Part 1 and Part 3. Further components of the system, such as the physical layer and data link control layer (DLC) in particular, are published in other documents. These may all be obtained from the European Telecommunications Standards Institute in F-06921 Sophia-Antipolis Cedex, France.
For networking devices in the home, one scenario which uses a combination of both networking systems, namely firstly wired and secondly wireless, has proved to be expedient. If data between the two different systems is also to be exchanged among the systems, a bridge circuit is consequently required for this purpose; on the one hand said circuit is therefore connected to the wired system and on the other hand it also has an interface to the wireless transmission system. Such a bridge circuit is therefore equipped with two interfaces, firstly for the wired transmission system and secondly for the wireless transmission system.
The invention relates to such a bridge unit. In particular, the invention solves a problem that occurs when the IEEE 1394 bus system is used as the wired system and the aforementioned HIPERLAN/2 system is used as the wireless transmission system. A separate specification was created for this application. This is called ETSI TS 101 493-3 V1.1.1 (2000/09); Broadband Radio Access Networks (BRAN); HIPERLAN Type 2; Packet Based Convergence Layer; Part 3; IEEE 1394 Specific Convergence Sublayer (SSCS). It is described in Annex C.3 of the aforesaid document that the maximum transmission delay with isochronous data transmission from the IEEE 1394 bus system into the HIPERLAN/2 system is 6.1 ms. Accordingly, 2.1 ms of this arises from the fact that in the worst case it is necessary to wait first for 17 IEEE 1394 bus packets to arrive before the data for a MAC transmission frame (Medium Access Control) has been collected. A further 2 ms time delay can arise from the fact that the time slots reserved for the station are available just when the received data needs to be made available by the DLC layer for transmission. In the extreme case, it is then necessary to wait for the next MAC transmission frame. 2 ms of delay time can thus also arise if the transmission frame was newly divided just at the moment when the data is available, and afterwards the time slots allotted to the station are positioned at another point of the MAC transmission frame.
In order to bridge this delay time, it is therefore necessary to implement a correspondingly large buffer memory in the bridge circuit. It is even recommended to dimension the buffer memory to be so large that even the delay time of 8 ms can still be buffered.